Synopsys says deal will help it support chip makers, which are evaluating new materials to extend Moore's law and develop novel memories.
Built on Synopsys' HBM and DDR4 IP, the complete DesignWare HBM2 platform enables designers to achieve their memory bandwidth, latency and power objec...
The companies are working to integrate Ansys' power integrity RedHawk technology with Synopsys' IC Compiler II physical implementation.
The embARC OSP has added support for the ARC HS processors, updated SecureShield libraries for secure execution environments and an OpenThread protoc...
The Data Fusion IP Subsystem is an integrated, pre-verified hardware and software IP product for devices requiring minimal energy consumption.
The test capability in LucidShape 2017.03 allows designers to perform illuminance-based visibility range tests and glare test for oncoming traffic.
FPGA design tools help automate the process for designers, making it easier and faster while also helping to remove import errors.
Synopsys’ DesignWare ARC HS38 processor, DDR4 and PCI Express 3.1 IP offer high performance at low power consumption for Starblaze’s SSD controller.
Forcheck technology integrated into Synopsys' Coverity static analysis system provides support to software written in Fortran language.
Synopsys has introduced the Verification IP (VIP) and source code test suite for DisplayPort 1.4, which features DSC 1.2 and eDP 1.4a/b.