Samsung promises higher yields on 7nm EUV process than on 10nm FinFET
SAN FRANCISCO — Qualcomm said it will continue to work with longtime foundry supplier Samsung Electronics on Snapdragon 5G chipsets using Samsung's 7nm Low Power Plus (LPP) process technology with extreme ultraviolet (EUV) lithography.
Samsung aims to take the lead in putting long-delayed EUV into production, with plans to use it in its 7nm LPP process starting in the second half of this year. Other leading-edge chip makers-- including Intel, TSMC and Globalfoundries--are targeting EUV production sometime in 2019.
Qualcomm (San Diego) said using the 7nm LPP EUV process technology for Snapdragon 5G will give the chips a smaller footprint, providing handset OEMs with space to support larger batteries or slimmer designs. The process technology and design of the Snapdragon chips is expected to result in significant improvements in battery life, Qualcomm said.
The 7nm LPP process offers up to a 40 percent increase in area efficiency with 10 percent higher performance or up to 35 percent lower power consumption compared to the foundry's 10nm FinFET technology, Samsung said.
Samsung has been building chips for Qualcomm for more than 10 years. While the announcement that Qualcomm will use Samsung's 7nm LPP process technology for its 5G Snapdragon chips is hardly unexpected, the news does demonstrate that the relationship between the two companies remains strong after the Nikkei news service reported late last year that Qualcomm would move some of its modem chip production from Samsung to rival TSMC,
The announcement is also a vote of confidence for EUV technology, which after decades of development finally appears poised for use in semiconductor production.
"This collaboration is an important milestone for our foundry business as it signifies confidence in Samsung’s leading process technology," said Charlie Bae, executive vice president of Samsung's foundry sales and marketing team, in a statement.
Samsung maintains that its 7LPP EUV technology involves less process complexity and will offer higher yield compared to its 10nm FinFET technology.
— Dylan McGrath is the editor-in-chief of EE Times.