SAN FRANCISCO — Intel gave further details on its technique for embedding spin-transfer torque (STT)-MRAM into devices using its 22nm FinFET process, pronouncing the technology ready for high-volume manufacturing. Embedded MRAM is considered a promising technology for applications such as internet-of-things (IoT) devices.

In a paper presented at the International Solid State Circuits Conference here Tuesday, Intel said it has used a "write-verify-write" scheme and a two-stage current sensing technique to create 7Mb perpendicular STT-MRAM arrays in its 22FFL FinFET process. The company had provided early details of its success in developing the first FinFET-based MRAM devices last year at the International Electron Devices Meeting.

The embedded MRAM technology achieves 10-year retention at 200°Celsius and endurance of more than 106 switching cycles, said Ligiong Wei, an Intel engineer who presented the paper Tuesday. The arrays have demonstrated write endurance of more than 1E06 cycles and read disturb error rate of more than 1E12 cycles, Wei said.

In addition to high endurance, the 22nm embedded MRAM technology boasts robust yields, with a bit yield rate of greater than 99.9%, according to Wei. However, manufacturing the devices requires error-correction code bits, increasing the size and power budget of the design, Wei said.

MRAM — which is a non-volatile memory technology — is considered a promising long term candidate to replace memory chip stalwarts DRAM and NAND flash, which face major scaling challenges as the industry moves to smaller nodes. But MRAM is also appealing as an embedded technology replacement for flash and embedded SRAM because of its fast read/write times, high endurance, and strong retention.

Die Photo Source: Intel ISSCC 13.3.

Globalfoundries has since 2017 been offering embedded MRAM on its 22FDX 22-nm FD-SOI process, but it is not known if any customers are using the technology in commercial products currently shipping.

Analysts believe that Intel is already using its embedded MRAM technology in currently shipping products for foundry customers.

According to Intel's ISSCC paper, each 0.0486um2 one transistor to one-magnetic tunnel junction (1T1MTJ) MRAM bit cell bitcell is 216×225nm2, with 2-polysilicon word lines. The tunnel-magneto-resistance ratio of the MTJs is 180% at 25°C, with a target device critical dimension between 60-80nm.

Wei said the eMRAM design is also tolerant of wide variations in supply voltage. The design achieves a 4ns read sensing time at 0.9V, but is also capable of 8ns read sensing time at 0.8V, she said.

Intel Summary Source: Intel ISSCC 13.3.

In a separate ISSCC paper presented Tuesday, Intel also described the development of resistive RAM (ReRAM) as a low-cost option for embedded non-volatile memory for SoCs used in IoT and automotive. The embedded ReRAM technology — also implemented in a 22nm FinFET process — demonstrate what the company says is the smallest and highest density ReRAM subarray and material innovations to allow low-voltage switching without impact to transistor reliability.