The R-IN Engine architecture enables simultaneous processing of network communications and complex applications with low delay, jitter and power consumption.
The basic structure of the R-IN Engine also provides the capabilities of a flexible host interface with required functions for process synchronisation and fast and direct access to the communication data.
For a single-core implementation, this interface can be used for an external host running the system application. In a dual-core implementation, it is a chip-internal interface between the R-IN Engine (communication part) and the main CPU of the device (application part). In this sense, the R-IN host interface is of course not an accelerator, but without the need of a typical communication interface it allows direct and zero-latency access into the R-IN Engine and its resources.
Figure 6: Block diagram of the R-IN32M3-EC.
Compared with other architectures, the advantages of the R-IN Engine with its different accelerators are reflected in higher CPU performance and increased stability while cutting the overall power consumption. Thus R-IN architectures optionally run the network communication at significantly reduced power dissipation, or they deliver a significant margin to compute additional complex tasks in the application.
With the R-IN Engine architecture described, a device can process at the same time both network communications and complex applications, with extremely low delays and low jitter and minimum power consumption. Due to the network functions and underlying structures the R-IN Engine covers not only all the protocols of the first group using a standard IEEE 802.3 hardware, but also one protocol of the second group using a specific communication controller. Thus, a multi-protocol industrial automation product can simply be implemented using the flexible and low cost R-IN single-device approach.
The R-IN Engine is integrated into the single-core R-IN32M3 and the dual-core RZ/T1 families. Other devices based on R-IN Engine are already under preparation or are being planned.
Figure 7: Block diagram of the dual-core RZ/T1 (derivative including R-IN Engine).
A further but not negligible advantage for R-IN software development is the quite simple protocol porting based upon the re-use of R-IN Engine hardware in different families. This is especially true for all protocols of the first group that run basically on the identical standard Ethernet hardware. When looking to the R-IN32M3-EC device example (EC: including EtherCAT Slave Controller, figure 7) the basic structure directly correlates with the ideal solution as shown in figure 3. It also includes the 100Mbit/s Ethernet PHYs and requires only a few external components to run the application and protocol in a single device.
This article first appeared in our sister publication, Boards & Solutions + ECE.