ZestDAQ provides common IP interfaces across multiple boards, which simplifies the porting of designs between USB and Ethernet modules.
Orange Tree Technologies has recently released ZestDAQ software platform for data acquisition (DAQ) and control applications running on the company’s USB and Gigabit Ethernet boards.
Provided free to Orange Tree customers, this software consists of multiple FPGA logic cores that allows the buffering, formatting and transfer of data between peripherals or sensors and a host PC to be as straightforward as possible.
With this framework, the user only needs to create the application specific code to interface to their peripherals and format the data in a suitable manner for transmission to the host PC. This reduces the design effort for common data acquisition and control architectures, saving time for end users and enabling them to concentrate on their own specialised sensors and applications.
ZestDAQ provides common IP interfaces across multiple boards, which simplifies the porting of designs between Orange Tree’s USB and Ethernet modules. It also includes a host software library and host software examples.
Figure 1: Core arrangement in a ZestET2 Ethernet board
This software platform includes a wrapper around the Ethernet interface to simplify network communication and a wrapper around the USB interface to multiplex multiple data streams across a single link. It also provides core code to simplify accessing the control and status registers in a board’s FPGA, and it supports multi-channel FIFO buffering of data in external SDRAM.
Orange Tree has a range of Gigabit Ethernet and USB boards, providing high-speed embedded device interconnect with the latest FPGA technologies. By delivering a simple way to connect real-time devices to computers, the boards save time and increase flexibility for customers.
As well as ZestDAQ, other software available from Orange Tree includes free Windows and Linux tools based on GCC and Eclipse for the GigEx User CPU, and Windows and Linux software support for configuring and communicating with the User FPGA. Free tools are available from Xilinx for creating FPGA designs.