Putting Neural Networks Back to Analog

Article By : Junko Yoshida

The startup is launching an ultra-low power processing platform that will detect, analyze and classify raw sensor data in the analog domain.

Aspinity, a Pittsburg-based startup founded in 2015, is launching Tuesday a Reconfigurable Analog Modular Processor platform, or RAMP. The ultra-low power, analog processing platform is designed to first detect, analyze and classify raw sensor data — in the analog domain. Once it distinguishes data (a voice, an alarm, a change in vibrational frequency or magnitude, etc.) from background noise, RAMP hands off the data for digitization.

Aspinity RAMP Chip

(Source: Aspinity)

The upshot of this “analyze-first-in-analog” approach is that it “reduces the power required at the edge by up to 10x and the volume of data handled by up to 100x for always-on applications,” according to Aspinity. The startup claims that RAMP can play a key role in battery-operated, always-on sensing devices for consumer, smart home, IoT and industrial markets.

Mike Demler, senior analyst at The Linley Group told EE Times, “RAMP’s most distinctive feature is its extreme low power. Drawing just 10 microamps during active operation is quite a feat for an analog chip.”

Aspinity’s founder and CEO Tom Doyle told us that he was delighted when he recently heard Gene Frantz talking about “the need to move neural networks back to analog.” Frantz, previously a technology fellow and a staunch promoter of DSP at TI, is now a professor at Rich University. Earlier this year, in an interview with EE Times, he suggested that AI needs a better solution and for that, “we should consider going back to analog signal processing.”

This was music to Doyle’s ears. Analog processing is precisely what Aspinity’s RAMP is set up to do.

Analog vs. Digital

Other chip vendors including STMicroelectronics and Renesas, for example, have been pitching end-point devices featuring AI capabilities for anomaly detections. How does Aspinity’s RAMP differ?

Joe Hoffman, director of wireless connectivity & machine sensing at SAR Insight & Consulting, said, “STMicroelectronics and Renesas utilize digital technology. They implement the fundamental elements of the artificial neuron by using digital circuitry and software on their core processors.” ST, for example, depends on ARM microprocessor cores, while Renesas uses its own Dynamically Reconfigurable Processor (DRP) — which Hoffman described as “a hybrid approach somewhere between and microprocessor core and an FPGA.” He said, “The DRP can be reconfigured on the fly.”

In contrast, Aspinity’s RAMP uses an analog circuit approach. Hoffman noted, Aspinity builds neurons and synapses by using analog designs rather than digital designs.

As a result, instead of developing a predictive maintenance system that continuously digitizes thousands of points of data to monitor trends in the changes of certain spectral peaks, “RAMP can sample and select only the most important data points, compressing the quantity of vibration data by 100x and dramatically decreasing the amount of data collected and transmitted for analysis,” according to the company.

Reducing the amount of data is the key to enabling a battery-operated, wireless sensor system.

Mythic vs. Aspinity

Analog was the original way to model neural networks. Digital came later, said Demler. “But more recently, researchers (and companies like Mythic and Syntiant) are looking at in-memory analog computation to reduce power compared to digital inference engines.”

By eliminating the digital memory transactions required in a typical inference engine, “You can potentially save lots of power and die area,” Demler explained.

Aspinity’s CEO Doyle said, “Just like a traditional digital computer architecture, Aspinity has both ‘code memory’ to store the structure of the algorithm and the parameters/coefficients of the algorithm, and ‘data memory’ to store a history of a signal’s characteristics as we process it. However, unlike a traditional computer, Aspinity is not using a chunk of memory blocks. Instead, both code memory and data memory “are intermixed with the compute components for efficiency and compactness,” explained Brandon Rumberg, Aspinity’s CTO and founder. Integrated inside RAMP is non-volatile memory.

In a way, Mythic and Aspinity are similar because their approach is “internal analog computation.” But that’s where the similarity ends.

Mythic depends on digital input. Aspinity, in contrast, processes analog inputs. Demler explained, “Mythic is just using flash memory cells as voltage-variable conductance elements to replace digital multiply-accumulators (MACs).” On the other hand, “Aspinity uses a variety of parametrized analog circuits; amps, filters, adders/subtractors, etc.”

6-8 bits precision

As Hoffman explained, “Digital circuitry offers much more precision in its computations than analog, and is compatible with well-known digital design processes and CMOS technology. For example, state of the art processors are all 64-bit width today, while the analog processes mentioned here [Mythic, Aspinity and others] are generally 6- to 8 bits of precision. [However], this lower precision is good enough for many applications.”

In summary, Hoffman noted, “Aspinity is focusing on a limited application set of acoustic processing for wake word/sound detection at ultra-low power. This is advantageous when the rest of the device can be put to sleep in a low power mode.”

Demler also believes that analog has its limitations, in process/voltage/temperature variability, etc. He noted, “That’s why we haven’t seen it gain much traction in commercial products.” On the flip side, though, “if you can eliminate all the digital memory transactions required in a typical inference engine, you can potentially save lots of power and die area.”

Applications

Aspinity sees a growing market for “voice-first devices” such as smart speakers and wearables/hearables. Doyle said, “Imagine a voice-first TV remote that runs for a year per battery change. That will give manufacturers a big competitive edge.”

According to Aspinity, the RAMP platform’s analog blocks can be reprogrammed with application-specific algorithms. RAMP can analyze raw analog data from different types of sensors including accelerometers used for industrial vibration monitoring.

digitize first vs analyze first

Digitize First vs. Analyze First (Source: Aspinity)

Demler noted, “RAMP is a special-purpose circuit.” In using RAMP, designers must consider cost vs. benefits of adding another component to their voice-activated devices. But is that a downside? Not exactly, Demler said. “RAMP is a voice (or sound) activity detector. It doesn’t determine exactly what is being said. In some systems, it would make a lot sense to integrate RAMP as the front end of a speech processor, rather than as a separate chip.”

Aspinity's CEO Doyle said that he plans to be in IP business in addition to selling chips. The company currently has a number of partners it's working with. "Some are cosumer companies and others are chipset partners," said Doyle. The chip is sampling today. The plan is to go into volume production in the first half of 2020.

Company

Aspinity was founded to commercialize research at West Virginia University. The startup has exclusive, full rights to use the technology developed at the university.

Aspinity has raised a total of “$3.6 to $3.7 million” in funding over three rounds. According to the CEO, Amazon participated in two rounds. The company has a team of ten engineers, many with extensive analog experience, said Doyle.

Virtual Event - PowerUP Asia 2024 is coming (May 21-23, 2024)

Power Semiconductor Innovations Toward Green Goals, Decarbonization and Sustainability

Day 1: GaN and SiC Semiconductors

Day 2: Power Semiconductors in Low- and High-Power Applications

Day 3: Power Semiconductor Packaging Technologies and Renewable Energy

Register to watch 30+ conference speeches and visit booths, download technical whitepapers.

Leave a comment