Buffer design qualifies for 650V on 200mm wafers
The GaN-on-Si device technology is Au-free and compatible with the wafer handling and contamination requirements for processing in a Si…
Arria 10 board achieves 40Gbps interoperability
The setup is composed of The Dini Group’s DNPCIE_80G_A10_LL board and Exostiv Labs’ Exostiv Dashboard for Intel FPGA.
Tiny OPNFV lab acts as data centre for NFV dev’t
The NFV PicoPod is a complete OPNFV Pharos pod, condensed to a cubic foot package and consists of six Marvell…
Keeping up with rapidly evolving 5G
Part of the problem is that 5G is not one proposed standard, it’s a growing set of them.
FPGA design suite offers mixed language simulation
The Libero SoC tool suite includes the Mentor Graphics ModelSim Simulator, which allows line by line verification of hardware description…
Hackers challenged to crack patented encryption
Contestants will have three weeks to hijack patented cryptography method Blurry Box and report their exploits to win ₹35.71 lakh…
Hyundai Mobis India centre to focus on future tech
The Hyderabad-based Mobis Technical Centre of India will be transformed into an R&D centre specialising in automotive software.
How to select COTS components for space apps
The selection of a COTS part is as much about how a component is used as the individual device itself.
Resistance scaling affects other design parameters
Applying resistance scaling can have side effects on other design parameters, like shorts, DRCs and density.
Resistance scaling fixes PNR, signoff STA mismatch
Resistance scaling is a powerful tool for meeting timing demands, particularly when there is miscorrelation between PNR and signoff STA…