2022-03-25 - UST

UST and KITVEN Invests in Calligo Technologies to Enable Development of Posit-powered RISC-V Devices

UST and KITVEN have jointly invested in Calligo Technologies for developing Posit-enabled RISC-V multicore processors.

2022-01-12 - RISC-V International

Ventana Micro Systems Joins RISC-V International Board

With its upgraded membership, Ventana founder and CEO Balaji Baktha will be joining the RISC-V Board of Directors.

2021-03-26 - Nitin Dahad

RISC-V International and CHIPS Alliance Collaborate on OmniXtend

RISC-V International and CHIPS Alliance have formed a new OmniXtend working group which will focus on creating an open, cache…

2021-02-09 - Majeed Ahmad

The Rise of RISC-V Processor Designs

The rise of the RISC-V open standard is more about innovation and freedom of choice than an ISA religious war...

2021-02-05 - Nitin Dahad

Open Source Hardware: What it Means for Chip Makers

Open source hardware is more complex, with multiple layers in the stack, meaning it’s not as simple as shipping software...

2020-05-28 - Charlie Cheng

Specialized Accelerators Enable Vector Processing on RISC-V

Demand for special purpose domain specific accelerators can benefit from using RISC-V vector extension with high-bandwidth memory system.

2020-04-21 - Gajinder Panesar

RISC-V Lets Us Start with a Clean Slate

RISC-V represents a clean slate. It offers a fantastic opportunity to build a platform that’s fit for 21st century products...

2019-12-12 - Nitin Dahad

First Core with RISC-V Vector Instruction Extension Delivered

Andes’ new processor cores enable scalability by delivering RVV instruction extension and new memory subsystem. The company claims to be…

2019-12-09 - Nitin Dahad

UltraSoC Donates Trace Encoder

Having the encoder available should help minimize the possible risk for potential RISC-V developers.

2019-10-16 - Kevin Krewell

Arm Offer Response to RISC-V

After decades, Arm has finally decided to allow licensees to build their own custom instructions, which are often useful to…