Ventana Unveils RISC-V CPU Compute Chiplet for Data Center

Article By : Nitin Dahad

The new Ventana Veyron V1 RISC-V CPU core running at 3.6GHz in 5nm is the centerpiece of a compute chiplet solution with chiplets supplied by different companies.

Ventana Micro Systems has announced its Veyron family of data-center class RISC-V processors, which will be offered in the form of high performance chiplets and IP. The first processor in this family, the Veyron V1, was announced at this week’s RISC-V Summit by Ventana founder and CEO Balaji Baktha.

Ventana Veyron chiplets
The new Veyron V1 core is the centerpiece of a compute chiplet solution with chiplets supplied by different companies. (Image: Ventana Micro Systems)

The new RISC-V CPU core is the centerpiece of a compute chiplet solution with chiplets supplied by different companies. Ventana’s Veyron platform solution also enables integration of a flexible domain specific accelerator for hardware/software codesign. Ventana said the Veyron V1 is the first RISC-V processor to provide single thread performance that is competitive with the latest incumbent processors for data center, automotive, 5G, AI, and client applications. It said the Veyron V1’s efficient microarchitecture also enables the highest single socket performance among competing architectures.

Ventana said the standards-based Veyron V1 compute chiplet and reference platform enable customers a time to market acceleration of up to two years and reduction of development costs by up to 75%. Chiplet based solutions also provide better unit economics by ‘right sizing’ compute, I/O, and memory. Composable architectures leveraging chiplets allow companies to focus on their innovation and differentiation to achieve workload optimization. Additionally, Ventana is providing software development kit (SDK) which includes an extensive set of software building blocks already proven on Ventana’s RISC-V platform.

Ventana will offer its core to customers via different paths, including IP licensing (Image: Ventana Micro Systems)

Veyron V1 is available in the second half of 2023 and is the first in a series of products from Ventana. High performance features of the Veyron V1 include: enterprise class RAS, virtualization, robust security, top-down performance tuning, and system IP such as IOMMU and advanced interrupt controller.

Balaji Baktha commented, “Our vision of delivering the highest performance RISC-V CPUs is helping to reshape next generation high performance open hardware architectures. Today, we have a significant first mover advantage by providing a platform that can allow customers to innovate and differentiate. Markets which require high performance compute such as data center, 5G, AI, automotive, and client will all benefit from our open standards-based, ultra-low latency chiplet solution that delivers rapid productization with significant reduction in development time and cost compared to the prevailing IP models. Ventana’s strong roadmap and customer engagement puts the company in prime position for sustained market leadership.”

Patrick Moorhead, founder and chief analyst at Moor Insights & Strategy, said, “Ventana has a world class team with an average of twenty plus years of experience bringing multiple new CPU architectures to market. Ventana is the first big core in RISC-V to show up, the only game in town, and has a jump on the market.”

Some of the key features of the Veyron V1 are:

  • Eight wide, aggressive out-of-order pipeline
  • 3.6GHz
  • 5nm process technology
  • 16 cores per cluster
  • High core count multi-cluster scalability up to 128 cores
  • 48MB of shared L3 cache per cluster
  • Advanced side channel attack mitigations
  • Comprehensive RAS features
  • Top-down performance tuning methodology
  • Provided with IOMMU and advanced interrupt architecture (AIA) system IP
  • SDK released with necessary software already ported to Veyron
  • Veyron V1 development platform available

 

This article was originally published on Embedded.

Nitin Dahad is the Editor-in-Chief of embedded.com, and a correspondent for EE Times, and EE Times Europe. Since starting his career in the electronics industry in 1985, he’s had many different roles: from engineer to journalist, and from entrepreneur to startup mentor and government advisor. He was part of the startup team that launched 32-bit microprocessor company ARC International in the US in the late 1990s and took it public, and co-founder of The Chilli, which influenced much of the tech startup scene in the early 2000s. He’s also worked with many of the big names—including National Semiconductor, GEC Plessey Semiconductors, Dialog Semiconductor and Marconi Instruments.

 

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