Xilinx Expands UltraScale+ Portfolio for Low Cost Intelligent Edge

Article By : Nitin Dahad

New form factors enable higher compute density in small size for intelligent edge applications.

Xilinx has expanded its UltraScale+ portfolio with new cost-optimized devices. They’re made with TSMC’s state-of-the-art integrated fan-out (InFO) packaging technology, enabling high compute density in compact form factors for intelligent edge applications.
Chetan Khona - Xilinx
Chetan Khona
In an interview with EE Times, Chetan Khona, director of the industrial, vision and healthcare group at Xilinx, said, “Compute density matters. That’s why we are excited about the new InFO package, which allows us to provide substantial DMIPS per area, in an ultra-compact size.”
The new Artix and Zynq UltraScale+ devices aim to address the growing need to miniaturize at the edge and endpoint, with form factors Xilinx said are 70 percent smaller than traditional chip-scale packaging. The Artix UltraScale+ is a brand new family and evolution of the Artix 7, optimized for high I/O bandwidth and DSP compute. Key new features are serial I/O performance designed to support many connectivity standards in vision, video, networking and storage. The family also adds new security features and signal processing capability. Meanwhile, the new Zynq UltraScale+ is Xilinx’s is optimized for cost and power, with 40% less static power compared to its previous version. Khona said, “It has all the architectural features of the Zynq family so is completely code compatible; the main differences are reduced logic resources and new packaging.” The hardware adaptable devices based on 16 nm technology in TSMC’s InFO packaging are cost-optimized to address a wider range of applications within the industrial, vision, healthcare, broadcast, consumer, automotive, and networking markets. Using InFO enables Artix and Zynq UltraScale+ devices to meet the need for intelligent edge applications by delivering high-compute density, performance-per-watt, and scalability in compact packaging options. They also leverage the architecture and production-proven technology of Xilinx’s UltraScale+ FPGAs and MPSoCs, which collectively are already deployed in millions of systems worldwide.
Xilinx InFO package for intelligent edge
The TSMC InFO packaging utilized by the new UltraScale+ devices enables higher compute density in an ultra-compact size. (Source: Xilinx)
The latter means they are scalable, which Khona said is a significant part of the story. “Our customers are telling us that scalability is the big thing. They want to be able to leverage what they already have to create new innovations and products.” The Artix UltraScale+ family is built on its production-proven FPGA architecture and is ideal for a range of applications including machine vision with advanced sensor technology, high-speed networking, and ultra-compact 8K-ready video broadcasting. Artix UltraScale+ devices deliver 16 gigabits-per-second transceivers to support emerging and advanced protocols in networking, vision, and video, while also delivering the highest DSP compute in its class. The cost-optimized Zynq UltraScale+ MPSoCs include the new ZU1 and production-proven ZU2 and ZU3 devices, all available in InFO packaging. As part of the multiprocessing SoC line from the Zynq UltraScale+ family, ZU1 is designed for connectivity at the edge and for industrial and healthcare IoT systems, including embedded vision cameras, AV-over-IP 4K and 8K-ready streaming, hand-held test equipment, as well as consumer and medical applications. The ZU1 is built for miniaturized compute-intensive applications and powered by a heterogeneous Arm processor-based multicore processor subsystem, while also being able to migrate to common package footprints for greater compute. One of its customers, Lucid Vision Labs, has worked closely with Xilinx to integrate the new UltraScale+ ZU3 into its next generation industrial machine vision camera, the Triton Edge. Rod Barman, founder and president at Lucid Vision Labs, said, “With the UltraScale+ ZU3 and its InFO packaging, Lucid was able to utilize an innovative rigid-flex board architecture to squeeze an amazing amount of processing power into an ultra-compact IP67, factory-tough camera.” Scalable and secure With the addition of Artix devices and the extension to the Zynq UltraScale+ family, Xilinx’s portfolio now spans across the high-end with Virtex UltraScale+, to the midrange with Kintex UltraScale+, to the new cost-optimized low-end. These new devices round out the portfolio and provide scalability for customers to develop multiple solutions using the same Xilinx platform. This preserves design investments across the portfolio and speeds time-to-market. Security is a critical component in Xilinx designs, and both cost-optimized Artix and Zynq UltraScale+ families include the same robust security features found across the UltraScale+ portfolio. Included are RSA-4096 authentication, AES-CGM decryption, DPA countermeasures, and Xilinx’s proprietary security monitor IP that adapts to security threats across the product life cycle, meeting the security needs for both defense and commercial projects. “The ability for customers to scale their designs using a single secure platform for a wide range of applications and markets is key to enabling faster, easier design integration as well as for capturing critical time-to-market opportunities,” said Dan Mandell, senior analyst, IoT and embedded technology at VDC Research. “Xilinx’s strategy to expand its portfolio to meet these market needs with its scalable and secure UltraScale+ Artix and Zynq families is compelling, especially considering the strong business opportunities in growth markets where these solutions are being deployed.” The first cost-optimized Artix UltraScale+ devices are expected to be available in production by Q3 CY2021, with Vivado Design Suite and Vitis Unified Software Platform tool support starting late summer. Zynq UltraScale+ ZU1 devices will also begin sampling in Q3 with tool support in Q2, and volume production of the extended portfolio beginning Q4. This article was originally published on EE Times. Nitin Dahad is a correspondent for EE Times, EE Times Europe and also Editor-in-Chief of embedded.com. With 35 years in the electronics industry, he's had many different roles: from engineer to journalist, and from entrepreneur to startup mentor and government advisor. He was part of the startup team that launched 32-bit microprocessor company ARC International in the US in the late 1990s and took it public, and co-founder of The Chilli, which influenced much of the tech startup scene in the early 2000s. He's also worked with many of the big names - including National Semiconductor, GEC Plessey Semiconductors, Dialog Semiconductor and Marconi Instruments.

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