Xilinx Takes on 5G O-RAN with Telco Accelerator Card

Article By : Brian Santo

The Xilinx T1 card handles the "boring 5G stuff," leaving a 5G baseband unit processor to handle applications...

In 5G, the move to open RAN allows network architects to take parts of a RAN that used to be integrated — notably baseband units, or BBUs — and redistribute their functions in a variety of combinations. That’s where Xilinx comes in with its new T1 Telco Accelerator Card for 5G O-RAN distributed units and virtual baseband units. A radio access network is basically the wireless part of a cellular network, which ultimately links to the network core, which is largely wireline. One of the elements of a RAN is the baseband unit (BBU), which is essentially the unit that smartphones and the like connect to. In 4G networks, the BBU is a single, integrated system. Originally, 5G BBUs were all integrated too, but then came a proposal for open standards for RAN (or open RAN, or O-RAN). With O-RAN, a BBU can be split in two; into a centralized unit, or CU, and a distributed unit, or DU. These often also get an O-for-open prefix, like so: O-CU and O-DU. A BBU thus divided can then also be referred to as a virtual BBU, or vBBU. And now we return you to your regularly scheduled article: The move to open RAN has created an opportunity to rethink a lot of how a RAN is constructed, including the relationship between the BBU’s central processor and other BBU circuitry. A traditional BBU will have a board equipped with a CPU (typically an Intel Xeon or perhaps an Arm-based equivalent) working in conjunction with a co-processor for fronthaul (it might be one of Xilinx’s Zynq UltraScale FPGAs), and another device to handle Layer 1 baseband (also possibly an FPGA-based product such as a Xilinx Zynq RFSoC, but alternatively an ASIC). There’s more than one reason to separate the functions. With some O-RAN implementations, it would be more efficient or cost-effective to put the BBU CPU in one place, and the fronthaul and Layer 1 baseband somewhere elsewhere in the network. Alternatively, if a network operator can relieve the CPU from having to perform any fronthaul and Layer 1 functions, it can use a less powerful (which is to say, less expensive) CPU. [Following is a link to a PDF from fiber optics supplier Hubert + Suhner showing the possible ways to split an open RAN: 5G Functional-Splits.]
Xilinx T1
[Click on the image to enlarge]
That’s what the T1 PCIe form-factor card does. It combines a Zynq Ultrascale FPGA to perform O-RAN fronthaul protocols and a Zynq RFSoC to handle Layer 1 offload from the CPU and, Xilinx said, accelerates them. Xilinx said the line-rate and compute-intensive functions the T1 offloads include: channel encoding/decoding using hardened LDPC and Turbo codecs, rate matching/de-matching, HARQ buffer management, and more, freeing the processor cores for running other services. “The intention was to do the boring 5G stuff on the card, and let the CPUs do all the interesting applications,” Mike Wissolik, director of product marketing at Xilinx, told EE Times. Another motivation, he acknowledged, was to provide OEMs some good reasons to use Zynq RFSoCs instead of ASICs. Those reasons include the potential to either save some money, get better performance, and in some cases both. Xilinx said the T1 can allow a reduction in the number of CPU cores required in a system. Also, as noted above, in a 5G open RAN the BBU can be split into an O-CU and an O-DU. Xilinx said the T1 enables an O-DU to “deliver greater 5G performance and services while reducing overall system power consumption and cost compared to competitive offerings.” Take Layer 1 encoding and decoding, for example. A Dell R740 server configured with a single-thread Xeon and one of its T1 cards provides encoding throughput of 17.7 gigabits per second and decoding throughput of 7.8 Gbps, according to Xilinx. “Those are the highest numbers we’ve seen,” Wissolik said. The T1 card is available and sampling now to customers worldwide. In its announcement, Xilinx included testimonials from VVDN, Mavenir, and Nokia. Volume production is expected by the beginning of 2021. Xilinx is offering both O-RAN fronthaul and 5G NR layer 1 reference designs, as well as pre-validated software to enable operators, system integrators, and OEMs to get to market quickly. Wissolik promised the product line will get additional members in the future.

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